The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 02, 2013
Filed:
Jun. 20, 2012
Shih-i Chen, Hsinchu, TW;
Chia-liang Hsu, Hsinchu, TW;
Tzu-chieh Hsu, Hsinchu, TW;
Chun-yi Wu, Hsinchu, TW;
Chien-fu Huang, Hsinchu, TW;
Shih-I Chen, Hsinchu, TW;
Chia-Liang Hsu, Hsinchu, TW;
Tzu-Chieh Hsu, Hsinchu, TW;
Chun-Yi Wu, Hsinchu, TW;
Chien-Fu Huang, Hsinchu, TW;
Epistar Corporation, Hsinchu, TW;
Abstract
An optoelectronic device has a substrate and a first window layer on the substrate with a first sheet resistance, a first thickness, and a first impurity concentration. A second window layer has a second sheet resistance, a second thickness, and a second impurity concentration. A semiconductor system is between the first window layer and the second window layer. The second window layer has a semiconductor material different from the semiconductor system, and the second sheet resistance is greater than the first sheet resistance. A method for manufacturing is provided, having the steps of providing a substrate, forming a semiconductor system on the substrate, and forming a window layer on the semiconductor system. The window layer has a semiconductor material different from the semiconductor system. Selectively removing the window layer forms a width difference greater than 1 micron between the window layer and semiconductor system.