The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2013

Filed:

Jan. 16, 2008
Applicants:

Prasanna Sundararajan, San Jose, CA (US);

David W. Bennett, San Jose, CA (US);

Robert G. Dimond, London, GB;

Lauren B. Wenzl, Niwot, CO (US);

Jeffrey M. Mason, Eldorado Springs, CO (US);

Inventors:

Prasanna Sundararajan, San Jose, CA (US);

David W. Bennett, San Jose, CA (US);

Robert G. Dimond, London, GB;

Lauren B. Wenzl, Niwot, CO (US);

Jeffrey M. Mason, Eldorado Springs, CO (US);

Assignee:

XILINX, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/44 (2006.01); G06F 12/00 (2006.01); G06F 13/00 (2006.01); G06F 13/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

Generation of cache architecture from a high-level language description is described. A description of an application in a high-level programming language is obtained. A data flow representation is generated from the description suitable for providing an implementation in hardware. The generating includes: identifying accesses to memory associated with the description; determining that at least a portion of the accesses to memory do not have one or more data dependencies for locally cacheable data; and assigning the portion to a distributed cache.


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