Analyzing jitter in a clock timing signal

Abstract

A clock timing signal derived from a clock timing source is converted into samples obtained at a plurality of sample times, each sample representing an amplitude of a clock timing signal at a corresponding sample time. A time-domain histogram of deterministic jitter (DJ) is derived from a plurality of the samples. A set of measurement-based data that is not derived from the samples is also received, from which a time-domain histogram of random jitter (RJ) is derived. A jitter measurement is determined by convolving the time-domain histograms of DJ and RJ. Tangible non-transitory computer-readable storage devices can contain instructions that when carried out on processor(s) carry out the above process An apparatus has a clock sampling unit and a signal analyzer to derive the measure of jitter. This abstract is not to be considered limiting, since other embodiments may deviate from the features described in this abstract.