The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2013

Filed:

Jul. 12, 2012
Applicants:

Yushi Koyama, Fuchu, JP;

Junichi Tsuda, Inagi, JP;

Hiroshi Mochikawa, Hachioji, JP;

Inventors:

Yushi Koyama, Fuchu, JP;

Junichi Tsuda, Inagi, JP;

Hiroshi Mochikawa, Hachioji, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 1/12 (2006.01); H02M 1/14 (2006.01); H02M 7/537 (2006.01);
U.S. Cl.
CPC ...
Abstract

According to one embodiment, a grid-tie inverter includes: a inverter performing pulse width modulation for a DC voltage; a first capacitor circuit connected to an input side of the inverter so as to form a neutral point; a second capacitor circuit connected to an output side of the inverter so as to form a neutral point; a common mode current bypass channel formed by connecting the neutral points of the first capacitor circuit and the second capacitor circuit; a grounded capacitor provided between the bypass channel and a ground; a first common mode choke coil unit including a common mode choke coil at least one of between the first capacitor circuit and the inverter and between the inverter and the second capacitor circuit; and an output filter converting a pulse width-modulated voltage outputted from the inverter into a sine AC voltage.


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