The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2013

Filed:

Oct. 21, 2010
Applicants:

Corey D. Hartman, Hutto, TX (US);

Brian T. Whitman, University Place, WA (US);

Peter Heinrich, Milton, WA (US);

Russell Smith, Taylor, TX (US);

Scott Munroe Deane, La Center, WA (US);

Timothy Spencer, Georgetown, TX (US);

Inventors:

Corey D. Hartman, Hutto, TX (US);

Brian T. Whitman, University Place, WA (US);

Peter Heinrich, Milton, WA (US);

Russell Smith, Taylor, TX (US);

Scott Munroe Deane, La Center, WA (US);

Timothy Spencer, Georgetown, TX (US);

Assignee:

Dell Products L.P., Round Rock, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 7/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory retention and support system includes a memory chassis. A board is mounted to the memory chassis. A memory connector is mounted to the board and includes a pair of guide members at opposite distal ends of the memory connector and a pair of opposing outer walls extending between the guide members. A connector reinforcing member engages the memory connector to urge the guide members toward each other and to urge the opposing outer walls toward each other. A damping member is operable to be positioned adjacent to and spaced apart from the memory connector in order to engage a memory module when the memory module is coupled to the memory connector. The connector reinforcing member and the damping member act to resist a discontinuities between a plurality of memory contacts on the memory module and a plurality of connector contacts on the memory connector.


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