The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2013

Filed:

Jul. 18, 2011
Applicants:

Mohammad Nizam U Kabir, Tempe, AZ (US);

Brandt Braswell, Chandler, AZ (US);

Inventors:

Mohammad Nizam U Kabir, Tempe, AZ (US);

Brandt Braswell, Chandler, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/12 (2006.01);
U.S. Cl.
CPC ...
Abstract

A comparator is provided. In one embodiment, a method of operating a comparator comprises providing a bias current (); comparing an input signal and a reference signal to determine a difference signal and an inverted difference signal (); latching the difference signal and the inverted difference signal to generate a first and second latched signals (); generating a control signal using at least the first and second latched signals (); and controlling the bias current in response to the control signal (), wherein the comparing the input signal and the reference signal () is activated and deactivated in response to the controlling the bias current (). In another embodiment, a comparator comprises a bias circuit () configured to provide a bias current; a comparator circuit () configured to determine a difference signal and an inverted difference signal by comparing an input signal and a reference signal, wherein the bias current is used to place the comparator circuit () in an active mode; a latch circuit () configured to latch the difference signal and the inverted difference signal to generate a first and second latched signals; a control circuit () configured to generate a control signal using at least the first and second latched signals; and a switch circuit () configured to use the control signal to control the bias current to place the comparator circuit () in an active mode and an inactive mode.


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