The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 25, 2013
Filed:
Jan. 11, 2007
Joaquin Torres, St. Martin le Vinoux, FR;
Laurent-georges Gosset, Toulouse, FR;
Joaquin Torres, St. Martin le Vinoux, FR;
Laurent-Georges Gosset, Toulouse, FR;
STMicroelectronics (Crolles 2) SAS, Crolles, FR;
Koninklijke Philips Electronics N.V., Eindhoven, NL;
Abstract
The present invention provides an improved method of forming air cavities to overcome IC via-misalignment issues. The method of forming air cavity trenches in-between metal lines of an integrated circuit includes the steps of partially removing () an intertrack dielectric deposited on an interconnect structure surface to control the height between the top surface of a metal line of the interconnect surface and the surface of the intertrack dielectric; depositing () a dielectric liner on the interconnect surface; removing () at least part of the dielectric liner on the interconnect surface; successively repeating () the deposition of the dielectric liner and the removal of the dielectric liner on the interconnect surface in so far as the interconnect surface is sufficiently protected by a remaining dielectric liner for forming of the plurality of air cavity trenches; and forming () at least one air cavity trench in-between the metal lines by etching the intertrack dielectric material.