The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 25, 2013

Filed:

Dec. 06, 2011
Applicant:

Junichi Ariyoshi, Yokohama, JP;

Inventor:

Junichi Ariyoshi, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01); H01L 21/8234 (2006.01); H01L 27/088 (2006.01); H01L 27/06 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823807 (2013.01); H01L 21/823814 (2013.01); H01L 21/823842 (2013.01); H01L 21/823857 (2013.01); H01L 27/0617 (2013.01); H01L 27/088 (2013.01);
Abstract

Gate electrodes are formed in a high speed transistor forming region, a low leakage transistor forming region, and a medium voltage transistor forming region, respectively. Thereafter, a photoresist film covering the medium voltage transistor forming region is formed. Then, ions of an impurity are implanted into a semiconductor substrate while using the photoresist film and the gate electrodes as a mask, and p-type pocket regions, extension regions, and impurity regions are thereby formed. Subsequently, another photoresist film covering the high speed transistor forming region is formed. Then, ions of an impurity are implanted into the semiconductor substrate while using the other photoresist film and the gate electrodes as a mask, and impurity regions and extension regions are thereby formed.


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