The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 18, 2013
Filed:
Jan. 14, 2011
Cong Yao, Shenzhen, CN;
Qiwei Liu, Shenzhen, CN;
Yu Liu, Shenzhen, CN;
Xiang LI, Shenzhen, CN;
Liqian Chen, Shenzhen, CN;
Shiming He, Shenzhen, CN;
Jiayin LU, Shenzhen, CN;
Cong Yao, Shenzhen, CN;
Qiwei Liu, Shenzhen, CN;
Yu Liu, Shenzhen, CN;
Xiang Li, Shenzhen, CN;
Liqian Chen, Shenzhen, CN;
Shiming He, Shenzhen, CN;
Jiayin Lu, Shenzhen, CN;
Huawei Technologies Co., Ltd., Shenzhen, CN;
Abstract
A variable-frequency bus adapter, a variable-frequency bus adapting method and a variable-frequency bus adapting system are provided. The method includes: generating a bus blocking indication according to a dynamic frequency scaling (DFS) request signal sent by a bus side; blocking a current bus transfer according to the bus blocking indication; and feeding back a DFS response signal to the bus side after blocking the current bus transfer, where the DFS response signal is adapted to enable the bus side to perform a DFS operation. In the method, the bus transfer is temporarily blocked during the DFS, so that undesired influence on peripheral components caused by unstable bus block during the bus DFS is reduced without increasing the number of clock domains of the system or modifying the peripheral components, thus reducing the complexity of the implementation of the system, and improving the applicability of dynamic voltage frequency scaling (DVFS).