The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 18, 2013

Filed:

Jan. 28, 2011
Applicants:

Osamu Kagaya, Tokyo, JP;

Hirofumi Nakagawa, Samukawa, JP;

Taichi Kogure, Kamakura, JP;

Inventors:

Osamu Kagaya, Tokyo, JP;

Hirofumi Nakagawa, Samukawa, JP;

Taichi Kogure, Kamakura, JP;

Assignee:

Oclaro Japan, Inc., Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B 26/00 (2006.01); G02B 6/12 (2006.01); G02B 6/36 (2006.01);
U.S. Cl.
CPC ...
Abstract

To achieve a size-reduction of an optical module having a circuit that generates a high-frequency clock signal for controlling optical modulation by an optical modulator and to suppress radiation of electromagnetic waves from the optical module. A through-hole via is formed on a multilayer printed circuit board so as to be insulated from a plurality of grounded wiring layers by an anti-pad. A coaxial connector and an intensity modulation control IC that generates a high-frequency clock signal are provided on the multilayer printed circuit board. The high-frequency clock signal is input to the coaxial connector through a micro-strip line formed on the multilayer printed circuit board. An open stub connected to the through-hole via is provided on a wiring layer between a first wiring layer and a second wiring layer among the plurality of wiring layers.


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