Method and apparatus to reduce wander for network timing reference distribution

Abstract

A network component comprising a first adaptation component, a second adaptation component, a system Phase-Locked-Loop (PLL) coupled to the first adaptation component, a comparison and voting logic component coupled to the first adaptation component and the system PLL component, a compensation logic component coupled to the comparison and voting logic component, and a positive/negative delay component coupled to the second adaptation component and the compensation logic component. Also disclosed is a network component comprising a comparison and voting logic function block configured to compare a plurality of internal timing references in a system PLL synchronization area, a compensation logic function block configured to calculate an offset value if any of the internal references substantially deviates from an expected value in a deterministic outcome, and a delay function block configured to add the calculated offset value to a timing reference that is forwarded to a subsequent node.