The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 11, 2013
Filed:
May. 19, 2011
Jong Min Kim, Seoul, KR;
Jae Hyun Yoo, Bucheon-si, KR;
Jong Min Kim, Seoul, KR;
Jae Hyun Yoo, Bucheon-si, KR;
Dongbu HiTek Co., Ltd., Seoul, KR;
Abstract
A Power Management Integrated Circuit (PMIC) that includes a substrate, a high-side (HS) region on the substrate, a low-side (LS) region spaced from the first region, a device isolation layer interposed between the HS region and the LS region, a metal interconnection connected to the HS region across the device isolation layer and configured to permit a high-voltage current to flow in the HS region, and at least one electric field shield between the metal interconnection and the device isolation layer. Since the electric field shield is disposed under the metal interconnection, a sufficient breakdown voltage can be ensured for the HS region and the LS region.