The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 11, 2013
Filed:
Jul. 30, 2010
Applicant:
Jeong Y. Choi, Palo Alto, CA (US);
Inventor:
Jeong Y. Choi, Palo Alto, CA (US);
Assignee:
MoSys, Inc., Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8242 (2006.01);
U.S. Cl.
CPC ...
Abstract
An embedded memory system includes an array of random access memory (RAM) cells, on the same substrate as an array of logic transistors. Each RAM cell includes an access transistor and a capacitor structure. The capacitor structure is fabricated by forming a metal-insulator-metal capacitor in a dielectric layer. The embedded RAM system includes fewer metal layers in the memory region than in the logic region.
Choi, Jeong. (2013). Method of forming a mim capacitor (U.S. Patent No. 8460995). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8460995
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile