The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2013

Filed:

Dec. 11, 2008
Applicants:

Kazutoshi Shimizume, Tokyo, JP;

Ikuro Hata, Tokyo, JP;

Akira Ishizuka, Tokyo, JP;

Inventors:

Kazutoshi Shimizume, Tokyo, JP;

Ikuro Hata, Tokyo, JP;

Akira Ishizuka, Tokyo, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
Abstract

Observability and controllability in a test of an analog LSI are increased. Analog signals input from input terminals INto INare supplied to diffusion layer regionsandvia transistorsto, and are accumulated as electric charge. A clock signal is applied to signal linesandalternately connected to gate electrodesto, thus allowing the accumulated electric charge to be transferred to the right direction. Electric charge/voltage conversion amplifierstoare connected to the diffusion layer regionsand, and the accumulated electric charge is converted into voltage and is output to output terminals VOUTto VOUTas analog signals. A scan-in terminal Sin is connected to a diffusion layer region, and a scan-out terminal Sout is connected to the diffusion layer regionvia an electric charge/voltage conversion amplifier


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