The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2013

Filed:

Nov. 30, 2007
Applicants:

Franck Dahan, Nice, FR;

Gilles Dubost, Valbonne, FR;

Sylvain Dubois, Antibes, FR;

Inventors:

Franck Dahan, Nice, FR;

Gilles Dubost, Valbonne, FR;

Sylvain Dubois, Antibes, FR;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 13/00 (2006.01); G06F 13/28 (2006.01); G06F 1/00 (2006.01); G06F 1/26 (2006.01); G06F 1/32 (2006.01); G06F 11/30 (2006.01); G06F 1/04 (2006.01); G06F 1/12 (2006.01); G06F 5/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

An apparatus and method for dynamically modifying one or more operating conditions of a memory controller in an electronic device. Operating conditions may comprise clock frequency and power, which may be modified or removed. Dynamic modification of operating conditions may be done for purposes of optimizing a parameter, such as power consumption. A mode, referred to as idle mode, may be used as a transitional or operational mode for the memory controller. The performance of the memory controller may dynamically vary in response to changes in its operating conditions. As such, the memory controller may comprise multiple modes, or submodes, of operation. The performance of the memory controller may depend on the type of memory it controls, for instance Double Data Rate (DDR) Dynamic Random Access Memory (DRAM).


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