The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 04, 2013
Filed:
Jun. 21, 2006
Benedykt Mika, Chandler, AZ (US);
Ragu Sridhar, San Jose, CA (US);
Ron Osgood, San Jose, CA (US);
Rohini Abhyankar, San Jose, CA (US);
Amrita Deshpande, Chandler, AZ (US);
Benedykt Mika, Chandler, AZ (US);
Ragu Sridhar, San Jose, CA (US);
Ron Osgood, San Jose, CA (US);
Rohini Abhyankar, San Jose, CA (US);
Amrita Deshpande, Chandler, AZ (US);
NXP B.V., Eindhoven, NL;
Abstract
Methods and systems directed toward a PLL circuit including a local lock detector receiving an error signal and providing a lock signal, and a charge pump for receiving the error signal and providing a charge signal. A loop filter provides a first loop filter bandwidth and a second loop filter bandwidth. The loop filter includes a first low-pass filter configured to receive the charge and lock signals, alter a filter characteristic in response to the lock signal, and provide a first filter signal. The loop filter includes a second low-pass filter configured to receive the first filter and lock signals, alter a filter characteristic in response to the lock signal, and provide a loop filter signal. The PLL circuit includes a VCO for receiving the loop filter signal and providing an output signal, and a divider for receiving the output signal and dividing it to provide the reference signal.