The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 28, 2013

Filed:

Oct. 03, 2011
Applicant:

Tsuyoshi Koike, Shiga, JP;

Inventor:

Tsuyoshi Koike, Shiga, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

In two inverters included in a latch in a memory cell, the source or drain of a PMOS load transistor connected to a memory node is cut off, and the source or drain of an NMOS drive transistor connected to another memory node is cut off, whereby internal data is fixed or permanently stored in the memory cell while ensuring a resistance to damage to the gate of the transistor and without impairing the regularity of the layout.


Find Patent Forward Citations

Koike, Tsuyoshi. (2013). Semiconductor memory device (U.S. Patent No. 8451654). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8451654

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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