The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 28, 2013

Filed:

Jan. 31, 2008
Applicants:

Hye-hyang Park, Suwon-si, KR;

Sun-a Yang, Suwon-si, KR;

Inventors:

Hye-Hyang Park, Suwon-si, KR;

Sun-A Yang, Suwon-si, KR;

Assignee:

Samsung Display Co., Ltd., Giheung-Gu, Yongin, Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/30 (2006.01);
U.S. Cl.
CPC ...
Abstract

An organic light emitting diode (OLED) display device and a method for aging the organic light emitting diode (OLED) display device. The OLED display device is constructed with an organic light emitting diode, a scan line for applying a scan signal, a data line for applying a data signal, a driving unit for applying the data signal in response to the scan signal, a driving transistor having a gate terminal electrically connected to the driving unit to supply a driving current to the organic light emitting diode in response to the data signal, and a first reverse bias transistor electrically connected between the gate terminal of the driving transistor and a first reverse bias voltage source. The method for aging the OLED display device includes: aging an organic light emitting diode, applying the same voltage to both of a first power supply voltage line, which is electrically connected to a first electrode of a driving transistor, and a second power supply voltage line, which is electrically connected to a second electrode of the organic light emitting diode, and applying a third reverse bias voltage to a gate terminal of the driving transistor.


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