Integrated circuit, method of generating a layout of an integrated circuit using standard cells, and a standard cell library providing such standard cells

Abstract

An integrated circuit, a method of generating a layout of such an integrated circuit using standard cells, and a standard cell library providing such standard cells, are disclosed. The method of generating the layout comprises forming a plurality of rows, and populating each row with a plurality of standard cells chosen in dependence on the functional components required by the integrated circuit, each standard cell having its abutment area abutting the abutment area of at least one adjacent standard cell in the row. Within each row, each standard cell in that row is arranged to have a voltage connection area that is aligned with a common routing track, but with each standard cell having its voltage connection area configured so as not to extend across the entire width of the standard cell. Within each row, for each standard cell in the row, the voltage connection area of that standard cell is then connected to one of a plurality of voltage supplies having regards to a voltage requirement of the corresponding functional component defined by the standard cell, and independent of the voltage supply to which each adjacent cell in the row is connected. This provides a particularly flexible mechanism for placing standard cells during the layout operation, since standard cells that are required to run off the same voltage supply no longer need to be placed together.