The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 28, 2013
Filed:
Jul. 14, 2010
Jing Chen, Shanghai, CN;
Xiaolu Huang, Shanghai, CN;
Jiexin Luo, Shanghai, CN;
Qingqing Wu, Shanghai, CN;
Xi Wang, Shanghai, CN;
Jing Chen, Shanghai, CN;
Xiaolu Huang, Shanghai, CN;
Jiexin Luo, Shanghai, CN;
Qingqing Wu, Shanghai, CN;
Xi Wang, Shanghai, CN;
Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Changning District, Shanghai, CN;
Abstract
The present invention discloses a method of reducing floating body effect of SOI MOS device via a large tilt ion implantation including a step of: (a) implanting ions in an inclined direction into an NMOS with a buried insulation layer forming a highly doped P region under a source region of the NMOS and above the buried insulation layer, wherein the angle between a longitudinal line of the NMOS and the inclined direction is ranging from 15 to 45 degrees. Through this method, the highly doped P region under the source region and a highly doped N region form a tunnel junction so as to reduce the floating body effect. Furthermore, the chip area will not be increased, manufacturing process is simple and the method is compatible with conventional CMOS process.