The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 28, 2013

Filed:

Apr. 08, 2010
Applicants:

Hiroshi Maki, Tokyo, JP;

Makoto Ise, Tokyo, JP;

Inventors:

Hiroshi Maki, Tokyo, JP;

Makoto Ise, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/50 (2006.01); H01L 23/48 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
Abstract

While an adhesive layer is provided over the rear surface of a semiconductor chip in die bonding, a lamination processing (main pressure bonding) is necessary for securing the adhesive state of the adhesive layer after the die bonding process (temporary pressure bonding). In this case, typically the hardening of the adhesive is developed by applying heat while pressing down the rear surface of the chip from above with a pressurization member. It has become clear that various problems exist in the lamination processing of the laminate chips by such a mechanical pressurization method as the chip becomes thinner. That is, the problems include chip damage at a part in an overhang state, a chip position shift caused by bending and non-uniform pressurization, and the like. One invention of the present application is to perform the lamination processing by static gas pressure after laminating and temporarily pressure-bonding the plurality of semiconductor chips over a circuit substrate in the die bonding process of a substrate product.


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