The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 28, 2013
Filed:
Aug. 19, 2011
Kenichiro Tanaka, Osaka, JP;
Tetsuzo Ueda, Osaka, JP;
Hisayoshi Matsuo, Toyama, JP;
Masahiro Hikita, Toyama, JP;
Kenichiro Tanaka, Osaka, JP;
Tetsuzo Ueda, Osaka, JP;
Hisayoshi Matsuo, Toyama, JP;
Masahiro Hikita, Toyama, JP;
Panasonic Corporation, Osaka, JP;
Abstract
A method for manufacturing a transistor assembly includes the steps of: (a) forming a transistor; (b) polishing a base substrate; and (c) securing the transistor of which the base substrate is polished to a support substrate. The step (a) is a step of forming a first semiconductor layer and a second semiconductor layer on a principle surface of the base substrate. The step (b) is a step of polishing a surface of the base substrate opposite to the principle surface. The step (c) is a step of securing the transistor on the support substrate in the presence of a stress applied on the base substrate in such a direction that a warp of the base substrate is reduced. The base substrate is made of a material different from that of the first semiconductor layer and the second semiconductor layer, and a tensile stress is applied on the second semiconductor layer.