The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 21, 2013
Filed:
Aug. 11, 2011
Matthew R. Ellavsky, Rochester, MN (US);
Sean T. Evans, Rochester, MN (US);
Timothy D. Helvey, Rochester, MN (US);
Phillip P. Normand, Chippewa Falls, WI (US);
Jason L. Van Vreede, Trempealeau, WI (US);
Bradley C. White, Rochester, MN (US);
Matthew R. Ellavsky, Rochester, MN (US);
Sean T. Evans, Rochester, MN (US);
Timothy D. Helvey, Rochester, MN (US);
Phillip P. Normand, Chippewa Falls, WI (US);
Jason L. Van Vreede, Trempealeau, WI (US);
Bradley C. White, Rochester, MN (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method, system and computer program product are provided for implementing an enhanced Z-directional macro port assignment or three-dimensional port creation for random logic macros of heterogeneous hierarchical integrated circuit chips. An initial port placement is provided on a layer for a macro. The initial port placement is expanded to provide a three-dimensional port shape including a plurality of metal layers along a z-axis. Wire routing of each of the macro level and a chip top level is defined within the expanded three-dimensional port shape. Each unnecessary metal layer of the expanded three-dimensional port shape is removed, providing a final three-dimensional port shape.