The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 21, 2013
Filed:
Oct. 25, 2006
Applicants:
Ralf Lerner, Erfurt, DE;
Wolfgang Miesch, Frankfurt, DE;
Inventors:
Ralf Lerner, Erfurt, DE;
Wolfgang Miesch, Frankfurt, DE;
Assignee:
X-FAB Semiconductor Foundries AG, Erfurt, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); H01L 29/10 (2006.01); H01L 29/94 (2006.01); H01L 29/788 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
Abstract
The invention relates to a simulation and/or layout process for vertical power transistors as DMOS or IGBT with variable channel width and variable gate drain capacity which can be drawn and/or designed by the designer with the respectively desired parameters of channel width and gate drain capacity and the parameters of volume resistance and circuit speed, which are correlated therewith, and whose electrical parameters can be described as a function of the geometrical gate electrode design. Here, both discrete and integrated vertical transistors may be concerned.