The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 21, 2013
Filed:
Oct. 25, 2011
Koki Ueno, Yokohama, JP;
Eietsu Takahashi, Yokohama, JP;
Shigefumi Irieda, Yokohama, JP;
Yasuhiro Shiino, Yokohama, JP;
Manabu Sakaniwa, Yokohama, JP;
Koki Ueno, Yokohama, JP;
Eietsu Takahashi, Yokohama, JP;
Shigefumi Irieda, Yokohama, JP;
Yasuhiro Shiino, Yokohama, JP;
Manabu Sakaniwa, Yokohama, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
A non-volatile semiconductor memory device according to one embodiment of the present invention includes a memory cell array and a control unit. The control unit is configured to control a repeat of an erase operation, an erase verify operation, and a step-up operation. The control unit is configured to perform a soft-programming operation of setting the memory cells from an over-erased state to a first threshold voltage distribution state when, in a series of erase operations, the number of erase voltage applications is more than a first number and less than a second number (the first number<the second number). The control unit is configured not to perform the soft-programming operation when the number of erase voltage applications is equal to or less than the first number or equal to or more than the second number.