The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 21, 2013
Filed:
Apr. 16, 2010
Anant Shankar Kamath, Bangalore, IN;
Krishnaswamy Nagaraj, Plano, TX (US);
Sudheer Kumar Vemulapalli, Allen, TX (US);
Jayawardan Janardhanan, Bangalore, IN;
Karthik Subburaj, Bangalore, IN;
Sujoy Chakravarty, Bangalore, IN;
Vikas Sinha, Bangalore, IN;
Anant Shankar Kamath, Bangalore, IN;
Krishnaswamy Nagaraj, Plano, TX (US);
Sudheer Kumar Vemulapalli, Allen, TX (US);
Jayawardan Janardhanan, Bangalore, IN;
Karthik Subburaj, Bangalore, IN;
Sujoy Chakravarty, Bangalore, IN;
Vikas Sinha, Bangalore, IN;
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
Phase interpolator and a delay circuit for the phase interpolator. The phase interpolator includes a variable delay circuit to rotate phase of an input clock to generate a phase rotated signal. The phase interpolator also includes a delay locked loop coupled to the variable delay circuit to generate a plurality of phase shifted outputs. The delay locked loop includes a plurality of delay elements. Each delay element includes a multiplexer and a delay cell coupled to the multiplexer. The multiplexer is configurable using a first control signal to output one of the phase rotated signal and a phase shifted output of the plurality of phase shifted outputs. The delay cell delays one of the phase rotated signal and the phase shifted output to generate another phase shifted output of the plurality of phase shifted outputs.