The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 21, 2013
Filed:
Aug. 13, 2010
Gerald K. Bartley, Rochester, MN (US);
Russell Dean Hoover, Rochester, MN (US);
Charles Luther Johnson, Tampa, FL (US);
Steven Paul Vanderwiel, Rosemount, MN (US);
Gerald K. Bartley, Rochester, MN (US);
Russell Dean Hoover, Rochester, MN (US);
Charles Luther Johnson, Tampa, FL (US);
Steven Paul VanderWiel, Rosemount, MN (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A circuit arrangement and method in one aspect utilize thermal-only through vias, extending between the opposing faces of stacked semiconductor dies, to increase the thermal conductivity of a multi-layer semiconductor stack. The thermal vias are provided in addition to data-carrying through vias, which communicate data signals between circuit layers, and power-carrying through vias, which are coupled to a power distribution network for the circuit layers, such that the thermal conductivity is increased above that which may be provided by the data-carrying and power-carrying through vias in the stack. A circuit arrangement and method in another aspect organize the circuit layers in a multi-layer semiconductor stack based upon current density so as to reduce power distribution losses in the stack.