The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8442177 B1

PDF
Full Text
Expired
Date of Patent:
May. 14, 2013

Filed:

Sep. 24, 2009
Applicants:

Kohei Teramoto, Tokyo, JP;

Masaru Kimura, Tokyo, JP;

Tsuyoshi Nakada, Tokyo, JP;

Fuminori Saito, Tokyo, JP;

Inventors:

Kohei Teramoto, Tokyo, JP;

Masaru Kimura, Tokyo, JP;

Tsuyoshi Nakada, Tokyo, JP;

Fuminori Saito, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A signal receiving apparatushas a memory circuit, writing of data contained in a digital input signal transmitted from a signal transmitting apparatusis performed using a clock signal separated and created by a PLL circuitfrom the digital input signal received, and reading is performed using a reference clock signal with quartz accuracy from a reference clock generating circuit. To reproduce the digital input signal by correcting the shift between the clock signal and the reference clock signal, the signal receiving apparatus detects the shift between the two clock signals. When the signal receiving apparatusside lags behind the signal transmitting apparatus, the data contained in the digital input signal undergoes thinning out, and when it leads, a signal generated from previous and subsequent digital input signal is interpolated.


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