The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 14, 2013
Filed:
Jun. 30, 2009
Phil A. Callahan, Austin, TX (US);
Ahsan Javed, Austin, TX (US);
Zhiwei Dong, Austin, TX (US);
Axel Thomsen, Austin, TX (US);
Donald E. Alfano, Austin, TX (US);
Timothy Dupuis, Austin, TX (US);
Ka Y. Leung, Austin, TX (US);
Phil A. Callahan, Austin, TX (US);
Ahsan Javed, Austin, TX (US);
Zhiwei Dong, Austin, TX (US);
Axel Thomsen, Austin, TX (US);
Donald E. Alfano, Austin, TX (US);
Timothy Dupuis, Austin, TX (US);
Ka Y. Leung, Austin, TX (US);
Silicon Laboratories Inc., Austin, TX (US);
Abstract
An isolator that includes first and second substantially identical circuitry galvanically isolated from each other and each having at least one communications channel thereon for communicating signals across an isolation boundary therebetween and each of said first and second circuitry having configurable functionality associated with the operation thereof. A coupling device is provided for coupling signal across the isolation boundary between the at least one communication channels of the first and second circuitry. First and second configuration memories are provided, each associated with a respective one of the first and second circuitry. First and second configuration control devices are provided, each associated with a respective one of the first and second circuitry and each configuring the functionality of the associated one of the first and second circuitry. The first and second configurable memories have stored therein complementary configuration information to control each of the functionalities of the first and second circuitry to operate in a complementary manner for communication of signals across the isolation boundary.