Current-mode logic buffer with enhanced output swing

Abstract

A differential buffer circuit having increased output voltage swing includes a differential input stage including at least first and second transistors, the first and second transistors being operative to receive first and second signals, respectively. The buffer circuit further includes a bias stage connected between the differential input stage and a first voltage source. The bias stage is operative to generate a quiescent current as a function of a third signal supplied to the bias stage. A load circuit is connected between a second voltage source and the differential input stage, first and second differential outputs of the buffer circuit being generated at a junction between the load circuit and the differential input stage. The load circuit includes first and second switching elements coupled with the first and second transistors, respectively. The first switching element is operative to electrically connect the first differential output to the second voltage source when the first transistor is turned off. The second switching element is operative to electrically connect the second differential output to the second voltage source when the second transistor is turned off.