The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 2013

Filed:

Dec. 15, 2010
Applicants:

Sweehan J. H. Yang, Tainan, TW;

Po-sheng Shih, Hsinchu, TW;

Chian-chih Hsiao, Taipei County, TW;

Hsien-tang HU, Taichung County, TW;

Ting-chung Liu, Taipei, TW;

Inventors:

Sweehan J. H. Yang, Tainan, TW;

Po-Sheng Shih, Hsinchu, TW;

Chian-Chih Hsiao, Taipei County, TW;

Hsien-Tang Hu, Taichung County, TW;

Ting-Chung Liu, Taipei, TW;

Assignee:

HannStar Display Corp., Wugu Industrial Zone, Taipei County, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/16 (2010.01); H01L 33/46 (2010.01);
U.S. Cl.
CPC ...
Abstract

A method for manufacturing a transflective liquid crystal display panel includes providing an array substrate having a plurality of pixel regions, each of the pixel regions includes a device region, a transmission region and a reflection region defined therein; forming a first metal layer on the array substrate; patterning the first metal layer to simultaneously form a gate electrode in the device region and a plurality of metal bumps in the reflection region; forming a first insulating layer having a rough surface and covering the gate electrode and the metal bumps on the array substrate; forming a patterned semiconductor layer on the gate electrode; forming a reflective layer covering the first insulating layer and having a rough surface in the reflection region; and sequentially forming a patterned second insulating layer and a transparent pixel electrode on the array substrate.


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