The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 30, 2013

Filed:

Aug. 14, 2009
Applicants:

Guy Klemens, San Diego, CA (US);

Nathan M Pletcher, Encinitas, CA (US);

Babak Nejati, San Diego, CA (US);

Norman L Frederick, Vista, CA (US);

Thomas a Myers, San Diego, CA (US);

Inventors:

Guy Klemens, San Diego, CA (US);

Nathan M Pletcher, Encinitas, CA (US);

Babak Nejati, San Diego, CA (US);

Norman L Frederick, Vista, CA (US);

Thomas A Myers, San Diego, CA (US);

Assignee:

QUALCOMM, Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01P 5/12 (2006.01); H03H 7/38 (2006.01);
U.S. Cl.
CPC ...
Abstract

An output circuit with integrated impedance matching, power combining, and filtering and suitable for use with power amplifiers and other circuits is described. In an exemplary design, an apparatus may include first and second circuits (e.g., power amplifiers) and an output circuit. The first circuit may provide a first single-ended signal and may have a first output impedance. The second circuit may provide a second single-ended signal and may have a second output impedance. The output circuit may include (i) first and second matching circuits that perform output impedance matching and filtering for the first and second circuits, (ii) a combiner (e.g., a summing node) that combines the first and second single-ended signals to obtain a combined single-ended signal, (iii) a third matching circuit that performs impedance matching and filtering for the combined single-ended signal, and (iv) switches to route the single-ended signals to different outputs.


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