The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 30, 2013
Filed:
May. 14, 2010
James Robert Howard, Reno, NV (US);
Gregory Llewellyn Lucas, Newark, CA (US);
James Robert Howard, Reno, NV (US);
Gregory Llewellyn Lucas, Newark, CA (US);
Other;
Abstract
The construction of a capacitive Power and/or Ground plane sandwich with fractal element structures to achieve the reduction or elimination of radiated emissions as 'noise' from the planes. This may be achieved in several formats, including the patterning of fractal elements on the outside edge of the ground plane, the patterning of fractal elements on the outside edge of the power plane and the patterning of fractal elements within both of the planes. Fractal element structures may also be formed on the edges of circuit lines, or other conductive elements within the printed circuit board. The ability of these fractal patterns to absorb or reject frequencies on the planes due to the operation of an electronic device on the printed circuit board enhancing and aiding the capacitive effect of the plane in the reduction or elimination of radiated emissions as electronic noise. By utilizing this design maximum quieting of electronic noise may be achieved in all axis (X,Y,Z) without the use of surface bypass capacitors or conventional techniques such as edge plating or via hole edge stitching.