The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 30, 2013
Filed:
Dec. 17, 2010
Sylvain Grosjean, Les Fins, FR;
Michel Willemin, Prêles, CH;
Alexandre Deschildre, Marin, CH;
Beat Pfefferli, Thielle-Wavre, CH;
Sylvain Grosjean, Les Fins, FR;
Michel Willemin, Prêles, CH;
Alexandre Deschildre, Marin, CH;
Beat Pfefferli, Thielle-Wavre, CH;
EM Microelectronic-Marin SA, Marin, CH;
Abstract
The measuring method is for measuring a physical parameter using an electronic interface circuit () for a capacitive sensor () with at least two capacitors (CX, CX) whose common electrode (CM) is mobile between the fixed electrodes. The electronic circuit includes an amplifier () connected to the common electrode (CM) by a switching unit (), a logic unit () connected to the amplifier for supplying first and second digital measuring signals, and a digital-analogue converter () for supplying a measurement voltage (V) to the electrodes on the basis of a conversion of one of the digital signals. The method consists in polarizing firstly the electrodes of the capacitors by the measurement voltage (V) on the basis of the first digital signals, then polarizing the fixed electrode of the first capacitor (CX) at a regulated voltage (V) and the fixed electrode of the second capacitor (CX) at a low voltage (V), then polarizing the electrodes of the capacitors (CX, CX, CM) by the measurement voltage (V) on the basis of the second digital measuring signal, and finally polarizing the fixed electrode of the first capacitor (CX) at a low voltage (V) and the fixed electrode of the second capacitor (CX) at a regulated voltage (V). At the end of the measuring cycles, the logic unit is able, on the basis of the first and second obtained digital measuring signals, to remove any voltage offset linked to the electronic components.