The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2013

Filed:

Jul. 25, 2007
Applicants:

Hiroki Dembo, Isehara, JP;

Yoshiyuki Kurokawa, Sagamihara, JP;

Masami Endo, Atsugi, JP;

Inventors:

Hiroki Dembo, Isehara, JP;

Yoshiyuki Kurokawa, Sagamihara, JP;

Masami Endo, Atsugi, JP;

Assignee:

Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken, JP;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 9/45 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device has an arithmetic processing circuit provided with an arithmetic circuit and a control circuit and a memory circuit provided with a ROM and a RAM, where the arithmetic processing circuit and the memory circuit are connected to each other through an address bus and a data bus, a machine language program executed using the arithmetic processing circuit is stored in the ROM, the RAM has a plurality of banks, processing data obtained by executing the machine language program is divided into a plurality of stacks to be written to the plurality of banks, and the arithmetic processing circuit is operated in accordance with the machine language program so that, in the plurality of stacks stored in the plurality of banks, a stack of which data is not used until the machine language program is terminated is omitted and contiguous stacks are written to the same bank.


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