The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2013

Filed:

Aug. 06, 2010
Applicants:

Peter Z. Onufryk, Flanders, NJ (US);

Cesar A. Talledo, San Jose, CA (US);

Inventors:

Peter Z. Onufryk, Flanders, NJ (US);

Cesar A. Talledo, San Jose, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/36 (2006.01);
U.S. Cl.
CPC ...
Abstract

A peripheral component interconnect express (PCIe) switch includes non-transparent endpoints, each of which is associated with a bus hierarchy domain. A source non-transparent endpoint in a source bus hierarchy domain receives a packet including a destination address and identifies a destination bus hierarchy domain including a destination non-transparent endpoint based on the destination address. Further, the source non-transparent endpoint translates a requester identifier in the packet to a translated requester identifier and generates a translated request packet including the translated requester identifier. The PCIe switch routes the translated request packet to the destination non-transparent endpoint through a non-transparent interconnect in the PCIe switch. In this way, the PCIe switch interconnects multiple bus hierarchy domains and is non-transparent in the multiple bus hierarchy domains. In further embodiments, the PCIe switch routes multicast packets to multiple destination non-transparent endpoints in multiple destination bus hierarchy domains.


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