The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 23, 2013
Filed:
Oct. 17, 2012
National Semiconductor Corporation, Santa Clara, CA (US);
Xiang Gao, Freemont, CA (US);
Ahmad Bahai, Lafayette, CA (US);
Mounir Bohsali, Alamo, CA (US);
Ali Djabbari, Saratoga, CA (US);
Eric Klumperink, Lichtenvoorde, NL;
Bram Nauta, Enschede, NL;
Gerard Socci, Palo Alto, CA (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A sampling phase locked loop (PLL) circuit includes a pull-up/down buffer configured to convert an oscillator reference clock into a square wave sampling control signal input to a sampling phase detector. The buffer circuit is configured to reduce power by controlling the switching of the pull-up and pull-down transistors (and thereby the transitions of the sampling control signal) so that the transistors are not on at the same time.