The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2013

Filed:

Sep. 23, 2011
Applicants:

Dong-chul Yoo, Seongham-si, KR;

Chan-jin Park, Yongin-si, KR;

Ki-hyun Hwang, Seongnam-si, KR;

Han-mei Choi, Seoul, KR;

Joon-suk Lee, Bucheon-si, KR;

Inventors:

Dong-Chul Yoo, Seongham-si, KR;

Chan-Jin Park, Yongin-si, KR;

Ki-Hyun Hwang, Seongnam-si, KR;

Han-Mei Choi, Seoul, KR;

Joon-Suk Lee, Bucheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods of manufacturing a semiconductor device include forming a stopping layer pattern in a first region of a substrate. A first mold structure is formed in a second region of the substrate that is adjacent the first region. The first mold structure includes first sacrificial patterns and first interlayer patterns stacked alternately. A second mold structure is formed on the first mold structure and the stopping layer pattern. The second mold structure includes second sacrificial patterns and second interlayer patterns stacked alternately. The second mold structure partially covers the stopping layer pattern. A channel pattern is formed and passes through the first mold structure and the second mold structure.


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