The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 23, 2013

Filed:

Jun. 15, 2010
Applicants:

Mitio Ohba, Osaka, JP;

Nobuya Matsutani, Osaka, JP;

Koji Shimoyama, Hyogo, JP;

Yuichi Takahashi, Osaka, JP;

Shinichi Morimoto, Hyogo, JP;

Inventors:

Mitio Ohba, Osaka, JP;

Nobuya Matsutani, Osaka, JP;

Koji Shimoyama, Hyogo, JP;

Yuichi Takahashi, Osaka, JP;

Shinichi Morimoto, Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The present invention provides a chip part manufacturing method comprising a separating process capable of suppressing deformation of chip parts, and also provides chip parts. It comprises a step of forming a plurality of frame-like void portions () in one main surface of substrate () and insulating resin layer () having a spiral void portion () disposed in the region thereof, a step of forming metal layer () in frame-like void portion () and spiral void portion () and on insulating resin layer (), a step of polishing metal layer () at least up to the upper surface of insulating resin layer and forming coil section () in spiral void portion (), and a step of forming a metal layer for connecting chip parts to frame-like void portion (), wherein the metal layer is melted and removed by using an etching agent to separate a plurality of chip parts connected to each other by a frame-like connection.


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