The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 16, 2013

Filed:

Jan. 19, 2005
Applicant:

Charles J. Purwin, Litchfield, NH (US);

Inventor:

Charles J. Purwin, Litchfield, NH (US);

Assignee:

Broadcom Corporation, Irvine, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 7/10 (2006.01);
U.S. Cl.
CPC ...
Abstract

A dual bus interface PCB includes a main chipset component, a first type bus interface connector, and a second type bus interface connector. The PCB can be configured at fabrication time to enable a variety of configurations for operation. Optionally, the PCB can also be provided at least one memory chip and a NIC (Network Interface Card) chip. By virtue of having a dual interface, the PCB can be used with either the first type or the second type bus. Furthermore, the dual interface PCB eliminates the need by chipset manufacturers to carry multiple PCB variations of the same product in order to support various bus interfaces. In one embodiment, the PCB is a dual PCI-X/PCI-E interface PCB.


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