The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 16, 2013

Filed:

Dec. 20, 2011
Applicants:

Makoto Tani, Inazawa, JP;

Takami Hirai, Toyota, JP;

Shinsuke Yano, Nagoya, JP;

Daishi Tanabe, Niwa-gun, JP;

Inventors:

Makoto Tani, Inazawa, JP;

Takami Hirai, Toyota, JP;

Shinsuke Yano, Nagoya, JP;

Daishi Tanabe, Niwa-gun, JP;

Assignee:

NGK Insulators, Ltd., Nagoya, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/12 (2006.01); H01L 23/053 (2006.01); H01L 23/00 (2006.01); H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H05K 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

In the laminated and sintered ceramic circuit board according to the present invention, at least a portion of the inplane conductor is fine-lined, such that the shape of the cross-section surface of the fine-lined inplane conductor is trapezoid, and the height (a), the length (c) of the lower base and the length (d) of the upper base of the trapezoidal cross-section surfaces, and the interval (b) between the lower bases of the trapezoidal cross-section surfaces of the inplane conductors adjacent in a plane parallel to the principal surfaces of the board meet a certain relation. This provides a laminated ceramic circuit board with low open failure rate, short-circuit failure rate and high reliability against high temperature and high humidity in a downsized and short-in-height (thin) semiconductor package.


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