The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 16, 2013
Filed:
Nov. 09, 2010
Sho Kato, Isehara, JP;
Fumito Isaka, Zama, JP;
Tetsuya Kakehata, Isehara, JP;
Hiromichi Godo, Atsugi, JP;
Akihisa Shimomura, Isehara, JP;
Sho Kato, Isehara, JP;
Fumito Isaka, Zama, JP;
Tetsuya Kakehata, Isehara, JP;
Hiromichi Godo, Atsugi, JP;
Akihisa Shimomura, Isehara, JP;
Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken, JP;
Abstract
There are provided a semiconductor device having a structure which can realize not only suppression of a punch-through current but also reuse of a silicon wafer used for bonding, in manufacturing a semiconductor device using an SOI technique, and a manufacturing method thereof. A semiconductor film into which an impurity imparting a conductivity type opposite to that of a source region and a drain region is implanted is formed over a substrate, and a single crystal semiconductor film is bonded to the semiconductor film by an SOI technique to form a stacked semiconductor film. A channel formation region is formed using the stacked semiconductor film, thereby suppressing a punch-through current in a semiconductor device.