The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8420420 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 16, 2013

Filed:

May. 21, 2011
Applicants:

Wei-pang Yen, Daxi Township, TW;

Hsien-kun Chiu, Taoyuan, TW;

Chan-chang Liao, Zhonghe, TW;

Chao-huan Hsu, Guishan Township, TW;

Inventors:

Wei-pang Yen, Daxi Township, TW;

Hsien-kun Chiu, Taoyuan, TW;

Chan-chang Liao, Zhonghe, TW;

Chao-huan Hsu, Guishan Township, TW;

Assignee:

Chunghwa Picture Tubes, Ltd., Bade, Taoyuan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of manufacturing a thin film transistor array substrate and a structure of the same are disclosed. The manufacturing method merely requires two steps of mask fabrication to accomplish the manufacture of thin film transistor array, in which the manufacturing method utilizes a first mask fabrication step to define a pattern of a source electrode and a drain electrode of the thin film transistor, and a partially-exposed dielectric layer, and utilizes a second mask fabrication step to define an arrangement of a transparent conductive layer. The manufacturing method and structure can dramatically reduce the manufacturing cost of masks and simplify the whole manufacturing process.


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Yen, Wei-pang. (2013). Method of manufacturing thin film transistor array substrate and structure thereof (U.S. Patent No. 8420420). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8420420

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