The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 09, 2013
Filed:
Nov. 27, 2008
Carlos Basto, Santa Clara, CA (US);
Jan-willem Van DE Waerdt, San Jose, CA (US);
Carlos Basto, Santa Clara, CA (US);
Jan-Willem Van De Waerdt, San Jose, CA (US);
NXP B.V., Eindhoven, NL;
Abstract
A method of producing an integrated circuit () using a system-on-chip (SoC) architecture includes providing a first circuit () in a first island of synchronicity (IoS); and providing a source-synchronous data link () between the first circuit () in the first IoS and a hard core () in a second IoS for communicating n-bit data elements between the first circuit () and the hard core (). The source-synchronous data link () includes a set of n data lines () for transporting the n-bit data elements between the first circuit () and the hard core (), and a source-synchronous clock line () for transporting a source clock between the first circuit () and the hard core () for clocking the n-bit data elements. The hard core () does not include a bus interface adaptor for interfacing with the source-synchronous data link ().