The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2013

Filed:

Nov. 30, 2010
Applicants:

Hardik Prakash Gandhi, Mountain View, CA (US);

Zigang Yang, Plano, TX (US);

Inventors:

Hardik Prakash Gandhi, Mountain View, CA (US);

Zigang Yang, Plano, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04L 27/08 (2006.01);
U.S. Cl.
CPC ...
Abstract

Crest factor reduction algorithms described herein may be used to improve power amplifier efficiency during low signal power conditions compared to traditional static threshold techniques. Techniques described herein insure that the signal power level at the output of the crest fact reduction block is held constant relative to the input power level under all signal power level conditions. Two different solutions may be implemented together or separately to achieve the desired conditions. The first technique provides constant ratio between input power and output power. Constant ratio of peak and average output levels keeps the amount of crest factor reduction applied to the signal constant, irrespective of the signal power level. A second technique is to hold signal power level constant in respect to the amount of crest factor reduction applied.


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