The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2013

Filed:

Jun. 21, 2005
Applicants:

Hsing-chien Yang, Taichung, TW;

Jin-ming Chen, Dadu Township, Taichung County, TW;

Lucian-yuan, Hsinchu, TW;

Inventors:

Hsing-Chien Yang, Taichung, TW;

Jin-Ming Chen, Dadu Township, Taichung County, TW;

Lucian-Yuan, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04N 7/48 (2006.01); H04N 7/32 (2006.01); H04N 7/42 (2006.01); H04N 7/50 (2006.01); H04N 7/34 (2006.01); H04N 7/36 (2006.01); H04N 7/38 (2006.01);
U.S. Cl.
CPC ...
Abstract

A circuit for computing sums of absolute difference (SAD) is provided. The circuit has an absolute difference circuit, a first adder, a first register and a first selective circuit. The absolute difference circuit receives a first data PMand a second data PSand output a absolute difference data AD, wherein AD=|PM−PS|. The first adder receives and adds the absolute difference data and a first accumulative data, and outputs a first sum. The register receives and locks the first sum according to a first preset timing sequence, and outputs a first sum of absolute difference data. The first selective circuit receives and selects the first sum of absolute difference data or 0, and outputs the selected data as the first accumulative data.


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