The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 02, 2013
Filed:
Sep. 15, 2011
Suguru Kawabata, Osaka, JP;
Shinobu Yamazaki, Osaka, JP;
Kazuya Ishihara, Osaka, JP;
Junya Onishi, Osaka, JP;
Nobuyoshi Awaya, Osaka, JP;
Yukio Tamai, Osaka, JP;
Suguru Kawabata, Osaka, JP;
Shinobu Yamazaki, Osaka, JP;
Kazuya Ishihara, Osaka, JP;
Junya Onishi, Osaka, JP;
Nobuyoshi Awaya, Osaka, JP;
Yukio Tamai, Osaka, JP;
Sharp Kabushiki Kaisha, Osaka, JP;
Abstract
A nonvolatile semiconductor memory device includes a memory cell array for storing user data provided by arranging memory cells each having a variable resistive element having a first electrode, a second electrode, and a variable resistor made of a metal oxide sandwiched between the first and second electrodes. The first and second electrodes are formed of a conductive material forming ohmic junction with the variable resistor and a conductive material forming non-ohmic junction with the variable resistor, respectively. The variable resistor changes between two or more different resistance states by applying a voltage between the electrodes. The resistance state after being changed is maintained in a nonvolatile manner. The variable resistive elements of all memory cells in the memory cell array are set to the highest of the two or more different resistance states in an unused state before the memory cell array is used to store the user data.