The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 26, 2013

Filed:

Apr. 22, 2009
Applicants:

Yasuyuki Endoh, Yokohama, JP;

Kazuhito Takei, Yokohama, JP;

Katuyoshi Miura, Yokohama, JP;

Tadanobu Nikaido, Yokohama, JP;

Yoshiaki Kisaka, Yokohama, JP;

Inventors:

Yasuyuki Endoh, Yokohama, JP;

Kazuhito Takei, Yokohama, JP;

Katuyoshi Miura, Yokohama, JP;

Tadanobu Nikaido, Yokohama, JP;

Yoshiaki Kisaka, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 7/00 (2006.01); H03D 3/24 (2006.01); H04J 3/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

According to the present invention, as shown in FIG.(), when a signal for clock recovery ED is generated, which is formed by alternately generating enable periods EN having a ratio (N/M) of N clocks' client data to M clocks' line data and disable periods Dto D, a phase of the disable period Dis advanced by a phase corresponding to the disable period (such as one clock period) during the enable period with reference to phase information added to the signal for clock recovery ED as shown in FIG.() when a stuff pulse in the line data is detected as indicated by the symbol min FIG.(), thereby generating the signal for clock recovery ED.


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