Solid-state imaging device, data transfer circuit, and camera system for compensating for circuit variations during image readout

Abstract

To make it possible to appropriately set a capturing timing for a pixel value. For this, the present invention includes a pixel array unitcomposed of pixelsarranged in a row direction and a column direction in a matrix manner and a latch unitprovided for each column constituting the pixel array unitand configured to convert a pixel value of the pixelinto a digital pixel value to hold the pixel value. Also, the present invention includes a column scanning unitfor selecting the latch unit, a capturing unitfor sequentially capturing the pixel value held by the latch unit selected by the column scanning unitin synchronism with a predetermined clock, and a delay unitfor delaying a clock for driving the capturing unitin a plurality of stages. With the configuration described above, first dummy data is set in the latch unit-m at the near end, and second dummy data is set in the latch unit-at the far end. Then, a delay amount in the delay unitis set as a delay amount at which both the first dummy data and the second dummy data can be captured by the capturing unit