The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 26, 2013

Filed:

Apr. 30, 2008
Applicants:

Kun-nan Cheng, Hsinchu Hsien, TW;

Yuan-chuan Hsu, Hsinchu Hsien, TW;

Hung-yi Lin, Hsinchu, TW;

Chung-ching Chen, Hsinchu Hsien, TW;

Inventors:

Kun-Nan Cheng, Hsinchu Hsien, TW;

Yuan-Chuan Hsu, Hsinchu Hsien, TW;

Hung-Yi Lin, Hsinchu, TW;

Chung-Ching Chen, Hsinchu Hsien, TW;

Assignee:

MSTAR Semiconductor, Inc., Hsinchu Hsien, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G09G 5/00 (2006.01); G09G 5/36 (2006.01);
U.S. Cl.
CPC ...
Abstract

A display controller for displaying multiple windows and associated memory access method are provided. The display controller receives a first video source and a second video source for displaying multiple windows, and includes a line buffer, a deinterlacer, a scaler, and a memory interface unit. The line buffer buffers pixel data of a non-overlapped area of a main image associated with the first video source, and pixel data of a sub image associated with the second video source. The deinterlacer is coupled to the line buffer for selectively deinterlacing data in the line buffer. The scaler is coupled to the deinterlacer for selectively scaling data outputted from the deinterlacer. The memory interface unit is coupled to the line buffer for accessing an external memory.


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